2026 年 10 月 17 日，以“一栈贯通，智算无界”为主题的 2026 人工智能开放计算大会暨众智 FlagOS 技术大会在北京举行；继 9 月 30 日 FlagOS 2.2 发布后，大会展示了从底层算子、编译器到模型部署与服务的技术进展，并提出 AI 模型快速换代而算力基础设施需长期服役的现实问题。
智源众智 FlagOS 2.2 从多芯适配走向跨芯复用，九大算子库合计覆盖 1454 个算子、较上一版增加 890 个，在上千个算子、10 款异构 AI 芯片测试范围内跨芯算子性能提升约 27%；GLM-5.3-Flash 实践中，存量昇腾 910B 逻辑服务吞吐达优化前 2.04 倍，指定条件下按租金折算的算力成本较对应商业 API 计费参考低 19.4%—27.6%，世界模型和 ARM 端侧推理也出现可量化的联合优化成果。
这标志着开放智算正从回答“支持哪些芯片”走向回答“能否持续优化每一种算力、持续支撑每一代模型”，使芯片企业可更聚焦架构特色，算力运营方在模型升级时多一条软件优化路径，模型开发者则有机会让算法创新更快跨越硬件边界。
一、扩大跨芯共享优化能力：算子总量超 1400，多芯片整体算子性能提升 27%
FlagOS 2.2 持续扩充通用计算、推理专用与科学计算算子，发布清单覆盖 9 个算子库。FlagGems 等公开算子由 564 个增至 1454 个，新增 890 个；首次发布 FlagGems-SGLang，包含 40 个多芯片高性能算子。新增能力面向实际计算需求：FlagGems 扩展线性代数、归约与训练反向接口；FlagGems-SGLang 覆盖 Attention、Mamba 状态更新、MoE、LoRA、采样与量化，本轮 NVIDIA 测试通过清单覆盖全部 40 个算子；FlagGems-vLLM 扩展 MLA、KDA/GLA/GDN2、TopK 与低精度计算。针对 Qwen3.8-Flash-Next，新增 8 个融合算子，并完成 CUDA Graph 完整入图。
围绕关键计算路径，联合优化算子与编译执行
FlagOS 2.2 覆盖 9 个算子库，FlagGems 等公开算子由 564 个增至 1454 个，新增 890 个；首次发布 FlagGems-SGLang，含 40 个多芯片高性能算子。通过算子实现与 FlagTree 编译优化结合，围绕低比特与混合精度、算子融合、按形状选择执行路径、编译与自动调优提升性能。在 10 家芯片、上千个算子上实现整体算子性能提升 27%，意味着 FlagOS 优化能力正从单点性能突破走向跨芯片、规模化系统性能提升。
AI 辅助研发：算子开发从专家手工优化走向规模化生产
算子跨平台覆盖的挑战不只是“写出代码”，更在于正确性、性能和可维护性共同达标。KernelGen 多芯片自动算子生成工具已支持九款 AI 芯片，把代码生成、硬件验证和自动调优衔接为规模化生产能力。本季度新增生成 765 个算子，其中 416 个在至少 5 款国产芯片上通过精度验证，并达到对应原生算子 80% 以上性能水平。
FlagPrism 跨芯片统一调试工具：开发者和 Agent 都能用好调优
FlagPrism 将 Triton 源码、编译器 IR 与设备执行信息关联，让跨芯开发从“可运行”走向“可解释”。Debugger 可追查数值问题到具体语句，Profiler 可拆解耗时并定位优化环节；已支持华为昇腾、天数智芯、摩尔线程、英伟达和燧原，帮助开发者和 Agent 复用调优方法。
当开发者、芯片厂商甚至算子生成 Agent 能够获得可对照的数值与性能反馈，跨芯复用的就不再只有某段优化代码，还包括一套发现问题、验证假设和持续迭代的方法。FlagGems、FlagTree、KernelGen 与 FlagPrism 的协同，是 FlagOS 2.2 区别于单纯适配工程的核心技术进展。
二、协同优化进入新模型适配：统一插件与跨芯量化，Day0 适配多达 12 款芯片
FlagOS 通过跨芯片框架插件库，把公共算子与通信等能力接入训练、推理框架；FlagOS-Compressor 提供跨芯片权重转换与量化能力，再配合编译、迁移、评测和发布等组件，将协同优化落实为开发者可用的模型版本，实现新模型一天内适配多达 12 款芯片。
框架插件：把底层优化接入训练与推理
FlagOS 统一跨芯插件系统像一组“插座”，让开发者沿用熟悉的模型开发方式，把多种芯片能力接入 vLLM、Megatron-LM、TransformerEngine、SGLang、Torch、VeRL、LightX2V 等框架。以 TransformerEngine-FL 为例，模型通过统一算子接口发起计算，OpManager 组织算子注册，按策略选择 FlagOS、厂商或 PyTorch 实现，并提供缓存与失败回退机制，减少对核心训练代码的改动。
FlagOS-Compressor：让权重与精度适应目标设备
当目标设备的低精度支持或显存容量与新模型不匹配时，权重转换与量化提供了另一条部署路径。FlagOS 2.2 首次发布 FlagOS-Compressor，根据模型结构与目标硬件选择处理方案，将权重转换、量化、导出与校验组织为统一流程。它可按模块选择量化策略，为敏感模块保留高精度，并导出权重、量化参数与运行配置。在 Qwen3.8-2.4T-A95B 适配中提供 BF16、FP8 到 INT8 的处理路径；Qwen3.5-397B-A17B 采用 W8A8 后模型文件由 751.41GB 缩减至 382.45GB，减少 49.1%，GPQA-Diamond 取得 84.85% 绝对准确率，并完成 NVIDIA H20 与国产 PPU 推理链路验证。
Day0 交付：新模型一天内适配多达 12 款芯片
依托插件、算子、编译器与量化工具的积累，新模型发布后的适配可减少重复工作。过去半年多次实践中，FlagOS 已实现新模型一天内适配到多达 12 款芯片。适配后还会重新测试评估模型在目标设备上的任务表现，并将模型与配置发布到 Hugging Face、魔搭等平台。Day0 体现响应速度，目标硬件上的测试和配套产物决定交付质量，具体服务性能仍需结合业务负载验证。
合作案例：中国电信星辰模型 Day0 适配 10 款芯片
中国电信星辰大模型在训练侧将 FlagGems 接入基于 MindSpore、CANN 和昇腾 NPU 的训练体系，用专项优化算子替换部分原生实现，同时复用 MindSpore 自动并行与分布式通信能力，mHC、TopK 等训练算子已完成全链路调试和端到端训练效果验证，MindFormers 集成 FlagOS 的工作也已开源合入；推理侧，Xing4.0-29B-A4B 已完成十款芯片平台上的适配、精度对齐和部署验证，其中八款采用标准适配，苹果 M5 Pro 与此芯 P1 采用 W4A8 端侧量化，团队完成 12 个推理算子的迭代替换，并将算子开源至 FlagGems 与 vLLM 主仓，在高并发、长输入测试中，相比英伟达原生算子实现，首 Token 时延降低 19.87%，解码速度提高 26.32%。
框架插件解决“上层框架如何调用不同芯片能力”，FlagOS-Compressor 解决“模型权重与精度如何适应目标设备”，Day0 交付则把二者与算子、编译、评测、发布衔接起来，形成从底层优化到模型多芯交付的闭环，推动协同优化真正进入新模型适配。
三、从运行模型到高效生产 Token：跨芯优化进入真实服务场景
模型完成跨芯交付后，还要面对真实应用要求：Token 服务关注新模型不断更新时，已有算力能否持续提供有竞争力的速度与成本；世界模型引入视频、空间和多模态数据，计算复杂度随之增加；模型进入端侧，又要在有限内存、算力和功耗条件下运行。这三类需求共同推动 FlagOS 从多芯适配走向持续协同优化。
DeepSeek V4.1 Flash：跨平台优化展现商业 API 竞争潜力
FlagOS 以 SGLang-Plugin-FL、FlagGems、FlagGems-SGLang、FlagTree 与 FlagCX 组成优化栈，在英伟达 H100 和平头哥 810E 上优化 DeepSeek V4.1 Flash。H100 采用 1P1D、W4A16/FP8，在 128K 输入、最多 8K 输出、开启 DSpark 的缓存命中 Coding 任务中，32 路和 64 路并发下每请求解码速度分别增加 31.7 和 21.9 tokens/s，提升 19.7% 和 18.0%。平头哥 810E 采用每节点 16 张 96GB 卡、1P1D、W8A8，相比该平台 SGLang 原生路径，24 路并发下每请求解码速度增加 57.2 tokens/s、提升 83.1%，48 路并发下增加 40.2 tokens/s、提升 91.5%。
GLM-5.3-Flash：存量 910B 服务吞吐约翻倍，场景测算成本较 API 计费降低 19.4%—27.6%
基于 FlagOS 技术栈优化，GLM-5.3-Flash 在 Agentic 回放场景的逻辑服务吞吐约为优化前的 2.04 倍，从 8.52k 提高至 17.36k tokens/s。该指标计入输入、输出及缓存命中的逻辑输入 Token，反映服务承载能力，并非纯输出生成速度。在另一项 512K 长上下文测试中，生成速度达到 60.9 tokens/s，接近官方 API 外部测量参考值 61.1 tokens/s，两者比值约 99.7%，该比较仅针对生成速度，并非同负载对照。按每台 8 卡 910B 月租 16,500 元、3P1D 部署、93% 缓存命中率及解码侧满载条件，测算每百万输出 Token 及其对应输入的租金折算算力成本：256K 输入/8 并发场景为 59.27 元，较对应商业 API 计费参考 73.55 元低 19.4%；512K 输入/4 并发场景为 104.53 元，较 API 计费参考 144.31 元低 27.6%。
以下测试均采用输出长度 1K；表中箭头左侧为厂商基线，右侧为 FlagOS 优化结果。
表 3｜昇腾 910B 长上下文推理性能对比（输出长度 1K）
这些结果为企业提供了一条可评估的路径：先通过软件优化延续现有设备的服务能力，再判断是否需要硬件升级。
合作案例：软通动力 GLM-5.2 的 p50 Token 间时延降低 14.53%
软通动力天元智算混合云服务平台接入 FlagOS 的算子、编译、通信与训推框架能力，连接上层模型服务与底层异构设备。双方在四台昇腾 910C 服务器上对 GLM-5.2 进行联合优化，Prefill 与 Decode 各占两台。五项改动全部启用后，服务端与客户端 p50 ITL 均降低 14.53%；反映长尾等待的 p99 ITL，服务端从 83.82 ms 降至 66.35 ms，降低 20.84%，客户端从 138.56 ms 降至 118.73 ms，降低 14.31%，为平台运营方评估实际业务负载下的服务能力提供依据。
上述实践表明，跨芯复用优化正从“运行模型”走向“高效生产 Token”：既支撑新模型在多类芯片上保持推理速度，也为存量设备承接新模型、企业服务平台降低时延和测算成本提供依据。具体部署仍需结合业务负载、时延要求和完整运营成本综合判断。
四、从 Token Factory 走向物理 AI：世界模型与端侧计算迎来新负载
AI 计算需求正沿三条路径扩展：数据中心的 Token Factory 追求持续演进和规模效率，端侧 AI 受限于内存、能耗与硬件空间，物理 AI 的具身世界模型则引入视频、空间、时间、动作及多传感器数据。FlagOS 提前布局，将算子库、编译器、框架等能力向物理 AI 和端侧计算延伸。
助力智源新一代具身世界模型：公共算子与训练系统协同
FlagOS 围绕 FlagGems 算子、训练框架与分布式策略，与智源新一代具身世界模型系统联合优化，VLM、Tx2V 和 Action 三个模块分别取得约 2.3×、1.9×、2.0× 加速，MFU 分别约为 33%、36%、35%。框架层采用固定序列长度组织数据，将稳定张量形状交给静态编译，用动态元数据表达样本差异，带来 19.7% 吞吐提升和 29.5% 显存下降；长序列 Attention 缓存输出 O 及 LSE 供反向复用，将前向重放次数从 288 次降至 0 次，生成分支吞吐提高 14.8%。FlagGems 为 Attention、索引和归约等关键计算提供优化实现，Attention 算子获得约 1.40—1.43× 加速，索引算子最高达到 2.97×，优化保留在公共算子库中可供后续模型与硬件复用。
LightX2V-Plugin-FL：统一插件体系延伸到视频与动作生成
LightX2V 是视频生成推理框架，LightX2V-Plugin-FL 是其接入 FlagOS 的插件：框架组织模型流程，插件连接目标设备与算子执行路径，FlagGems 承担实际 Attention 计算，使已有算子进入视频生成反复执行的去噪循环，减少为不同芯片分别改造模型框架的工作。DreamZero-DROID 的双卡验证跑通从图像输入到视频与动作输出的链路，说明公共算子经统一插件进入视频生成框架，并在国产硬件上完成跨芯运行与完整输出；速度提升仍需同条件基线测试。
ARM CPU：MiniCPM5-2B 在 M5 Pro 上生成约 92 tokens/s
FlagOS 2.2 独立发布 FlagTree-CPU，针对 ARM CPU 推进统一编译、低比特算子与运行时优化。工具链围绕 I8MM、SDOT 及流式访存等路径差异化设计，并通过算子融合与执行调度减少重复开销；在具备相应指令支持的 CPU 上，SME2 与 NEON I8MM 协同处理同一层 GEMM，使完整模型 Prefill 吞吐提高 21% 至 25%。在 Mac M5 Pro、CPU-only 测试中，MiniCPM5-2B 的 Prefill 速度超过 1000 tokens/s，Decode 达到 91.66 tokens/s；Qwen3.8-27B 采用 DFlash2 后，Decode 从 12.73 提高到 23.40 tokens/s，约为原来的 1.84 倍，为端侧应用在模型能力、设备内存与时延之间选择配置提供依据。
从具身世界模型训练，到视频与动作生成插件，再到 ARM CPU 端侧推理，FlagOS 正把公共算子、统一插件和编译优化从 Token Factory 延伸到物理 AI 与端侧计算。世界模型训练中的加速比与 MFU、视频生成中的跨芯运行验证、端侧 CPU 上的生成速度，共同表明协同优化开始覆盖新负载；部分性能提升仍需结合同条件基线和实际业务负载继续验证。
五、从技术共建到全球生态：代码贡献者增加 55%，下载量增加四倍
国际合作：拓展开放计算的全球协作
智源众智 FlagOS 立足中国、走向全球。国际合作既包括中非创业与 AI 伙伴研讨会、阿布扎比 Open Compute Workshop 等技术交流，也包括开发者与师资培养。全球 AI 算力师资发展计划第二期在 UNDP 支持下与非盟 ASRIC 联办，汇集来自 30 多个国家的近 50 位高校骨干教师。OASIS-AI 2026 @ MICRO Workshop 进一步聚焦异构 AI 系统开放架构与软件基础设施。联合国“开放计算工作组”已于 9 月 28 日获批成立，首次会议计划于 11 月 APEC 期间举行。
开发者社区：季度下载量增加四倍，代码贡献者持续增加
让多种硬件共同维护不断更新的模型生态，需要各方长期投入。FlagOS 每次发版都依赖多个开源社区合作，持续与 PyTorch、Triton、vLLM、SGLang、Megatron、TransformerEngine、VeRL 等上游社区协作维护接口与实现。截至第三季度，智源 FlagOS 生态成员单位达 107 家，季度社区下载量为 464,336 次，是第二季度的 4.76 倍。从 2.1 到 2.2，合并 PR 数从 1,890 增至 4,890，代码提交从 5,100 增至 9,730，新建 Issue 从 420 增至 1,423，代码贡献者达 264 位、增加 55%。
当前 AI 模型可能 3 个月一代，算力基础设施却要在多年中创造价值。FlagOS 2.2 显示，一条值得持续投入的技术路径越来越清晰：把面向新模型的算子、编译、量化和系统优化沉淀为可复用公共能力，通过统一接口交付给不同芯片，再在真实模型与服务负载中不断验证收益。从 Token Factory 到端侧 AI 与世界模型，开放计算的价值不只是增加硬件选择，更是让每一种已投入的算力，都有机会随着软件生态进步持续发挥作用。
本文由 AI宝库自动抓取并翻译，版权归原作者所有；如需查看原文请点下方链接。
On 17 October 2026, the 2026 Artificial Intelligence Open Calculator Congress and the Mentalist FlagOS Technical Assembly were held in Beijing; following the 30 September FlagOS 2.2 publish, the Congress demonstrated the technological progress from the bottom counter, the compiler to the model deployment and service, and raised the reality of the AID model's rapid replacement for long-term service.
FlagOS 2.2 From multi-chip fit to cross-chip reuse, the nine major arrays cover a total of 1,454 algorithms, 890 more than the previous edition, increasing the performance of cross-chip algorithms by about 27 per cent in the range of thousands of algorithms, 10 isomer AI chips; in the GLM-5.3-Flash practice, stock strangling 910B logical services is up to 2.04 times the pre-optimal 2.04 times, and the calculated cost of rent-based conversion under specified conditions is lower than the commercial API reference of 19.4 per cent - 27.6 per cent, and the world model and ARM side-side reasoning has been combined to optimize results with quantization.
This represents a move from an answer to an answer to "What are the chips supported" to an answer to "Is it possible to continuously optimize each calculator and sustain each generation of models" so that the chip enterprise can focus more on the features of the architecture and the computing operator? There is an additional software optimized path when the model is upgraded, and model developers have the opportunity to allow algorithms to move faster across hardware boundaries.
I. Expanded cross-core sharing optimization: total number of algorithms over 1400, overall multichip algorithm performance improvement 27%
FlagOS 2.2 Continuous expansion of generic, reasoning-specific and scientific computing algorithms, with the publish list covering nine subsystems. The number of open accounts such as FlegGems increased from 564 to 1,454, adding 890; the first publish FlagGems-SGLang, containing 40 multichip high-performance algorithms. The new capabilities are oriented to actual computing needs: FlagGems Extension Linear Algebra, Consortance and Training Reverse Interface; FlagGems-SGLang overAttention, Mamba Status Update, MoE, LoRA, Sampling and quantization. This round of NVIDIA tests covers all 40 algorithms; FlagGems-v LLM Extension MLA, KDA/GLA/GDN2, TopK and low precision calculations. For Qwen3.8-Flash-Next, add 8 integration algorithms and complete the complete CUDA Graph entry.
Joint optimization of algorithms and compilation execution around critical computation paths
FlagOS 2.2 Covers nine sub-registers, and Flaggems, among others, increased from 564 to 1,454 and added 890; the first publish Flaggems-SGLang, containing 40 multichip high-performance algorithms. Compositing with FlagTree is done through algorithms, around low bits and mixed precision, integration of algorithms, choice of path by shape, and compilation and automatic modulation to enhance performance. Achieving an overall algorithm performance increase of 27 per cent in 10 chips and thousands of algorithms means that FlagOS optimization is moving from single-point performance to a cross-chip, scale-up system.
AI Auxiliary R & D: from expert manual optimization to scale production
The challenge of the algorithm's cross-platform coverage is not just to “write the code”, but to achieve common standards of correctness, performance and maintenance. The KernelGen Autocalculator Generation Tool has supported nine AI chips, which connect code generation, hardware validation and automatic alignment to scale production capacity. New 765 algorithms were created this quarter, of which 416 were validated with precision on at least 5 of the nationally produced chips and reached a performance level of 80 per cent or more for the progeny.
FlegPrism Crosschip Harmonisation Tool: Both developers and Agent are good for emulation
FlegPrism links Triton source code, compiler IR and equipment implementation information, allowing cross core development to move from " running " to " explaining ". Debugger can trace numerical questions to specific statements, and Profiler can break time and position optimized links; support has been provided to the Chinese fortified, day-to-day smart cores, molar threads, Weida and Ulysses to help developers and Agent to re-route.
When the developer, the chip manufacturer and even the algorithm generate Agent can obtain comparable values and performance feedback, the cross-chip reuse is no longer limited to an optimisation code, but also includes a methodology for problem detection, validation assumptions and continuous iterativeity. The synergy between Flaggems, FlagTree, KernelGen and FlagPrism is the core technological advancement of FlagOS 2.2 as distinct from the simple adaptation project.
Coordinated optimization into new model adaptation: Unified plugins and cross core quantization, Day0 fit up to 12 cores Film
Through the cross-chip frame plugin library, FlagOS provides cross-chip weight conversion and quantization capability to access training, reasoning and other capabilities, such as public algorithms and communications; FlagOS-Compressor provides cross-chip weight conversion and quantization capability, which, in conjunction with components such as compilation, migration, evaluation and publish, will work together to optimize the implementation of model versions available to developers and achieve a new model fit of up to 12 chips a day.
Frame Plugin: Optimizing bottom access training and reasoning
The FlagOS unified cross-chip plugin system is like a set of “plugs”, allowing developers to follow the familiar model development approach and connect multiple chip capabilities to frameworks such as vLM, Megatron-LM, TransformerEngine, SSGLang, Torch, VeRL, LightX2V. In the case of TransformerEngine-FL, the model initiates the calculation through a unified algorithm interface, OpManager Organization Calculator registers, strategically selects FlagOS, manufacturer or PyTorch and provides cache and failed rollback mechanisms to reduce changes to core training codes.
FlagOS-Compressor: Equivalent weight and precision to target devices
When the low precision support of the target equipment or the capacity of VRAM does not match the new model, the weight conversion with quantization provides another deployment path. FlagOS 2.2 For the first time publish FlegOS-Compressor, selects the treatment according to the model structure and target hardware, and converts weights, quantization, and exports and validates the Organization as a single process. It selects the quantization policy by modules, preserves high precision for sensitive modules and exports weights, quantization parameters and operating configurations. Qwen 3.8-2.4T-A95B adapts to provide treatment pathways for BF16, FP8 to INT8; Qwen3.5-397B-A17B uses the W8A8 model file down from 751.41GB to 38.2.45GB, down 49.1%, GPQA-Diamund achieves 84.85% absolute accuracy and completes the verification of the NVIDIA H20 and the PPU reasoning chain.
Day0 Delivery: New model fit up to 12 cores in one day Film
Based on the accumulation of plugins, algorithms, compilers and quantization tools, the adaptation of the new model publish can reduce duplication of work. In practice over the past six months, FlagOS has achieved a new model of up to 12 chips a day. After adaptation, the mission performance of the assessment model on the target equipment will be re-tested and the model and configuration of the publish to a platform such as Hugging Face, Magic. Day0 reflects the speed of response, the quality of delivery determined by testing on target hardware and associated products, and the need for specific service performance to be combined with operational load validation.
Case of cooperation: China Telecommunications Star Model Day0 Fit 10 cores Film
The Chinese telecommunications star LLM has been trained to access Flaggems to a training system based on MindSpore, CANN-A4B, which replaces some of the originals with a dedicated optimized calculator, while reusing the MindSpore automatic parallel and distributed communication capability, mHC, TopK, etc., trained calculators have completed full-chain debugging and end-to-end training, MindFormers integrated FlegOS work has also been sourced; the reasoning side, Xing4.0-29B-A4B has completed matching, precision matching and deployment verification of 10 chip platforms, eight of which are standard-fitting, apple M5 Pro with the P1 using the W4A8 side quantization, team has completed 12 iterative replacements, and increased the number of calculators to Flaggems and vLM in high- and long-to-to-to-to-to-to-be tests to achieve Z8% Z8 Z8 Q.
The framework plugin addresses "how the upper-level framework deploys different chip capabilities", "how model weights and accuracy adapt to the target equipment" by FlagOS-Compressor and "how model weights and accuracy adapts to the target equipment" by linking the two to algorithms, compiles, evaluates, publish, to form a closed ring from the bottom to the model multiple core delivery, and to promote synergy and optimization to actually fit into the new model.
iii. From operating model to efficient production
Once the model has been delivered across cores, it is also subject to real application requirements: Token services focus on whether the new model is continuously able to provide competitive speed and cost; the complexity of calculation increases with the introduction of video, spatial and multimodular data into the world model; and the model goes to the end and operates under limited memory, computing and power-consuming conditions. These three types of needs together drive FlagOS from multi-core adaptation to continuous synergetic optimization.
DeepSeek V4.1 Flash: Optimizing Business API Competition Potential across Platforms
FlagOS is an optimised stack of SGLang-Plugin-FL, FlagGems, FlagGems-SSGLang, FlagTree and FlagCX, optimizing DeepSeek V4.1 Flash on H100 Peace Head 810E. H100 Using 1P1D, W4A16/FP8, of the 128K input, up to 8K output, opening DSpark 's cache hit Coding task, 32 and 64 roads were increased by 31.7 and 21.9 tokens/s, respectively, by 19.7 per cent and 18.0 per cent. Hiranco 810E uses 16 96GB cards, 1P1D, W8A8 per node, which increases the speed of the SGLang primary path by 57.2 tokens/s, 83.1 per cent, and 40.2 tokens/s and 91.5 per cent for each request.
GLM-5.3-Flash: stock 910B services almost doubled, scene measurement costs were 19.4%-27.6% lower than API costs
Based on the FlagOS technology warehouse optimization, the GLM-5.3-Flash logical service in the Agenic replay scene was approximately 2.04 times before the optimization, from 8.52k to 17.36k tokens/s. This indicator is included in the logical input of input, output and cache hit token, which reflects service carrying capacity and is not a pure output production rate. In another 512K long context test, the production rate reached 60.9 tokens/s, close to the official API external measurement reference value 61.1 tokens/s, the value of which was approximately 99.7 per cent, which was only for the rate of generation and not against the load. Based on the monthly lease of $16,500 per card, 3P1D deployment, 93 per cent cache hit and decoded side full capacity, the calculated cost per million output Token and its rental value to be entered is: 256 K input/8 and the scene is 59.27, which is 19.4 per cent lower than the commercial API reference, 73.55 per cent lower; and 512 K input/4 combined with the scene is 104.53, which is 144.31 per cent lower than the API reference.
The following tests use output length 1K; the manufacturer ' s baseline is on the left side of the arrow in the table and the FlagOS optimization results on the right side.
Table 3 |昇 910B Long context reasoned comparison (output length 1K)
These results provide the enterprise with an assessable path: first, to optimize the service capacity to continue existing equipment through software, and then to determine whether hardware upgrades are required.
Case of cooperation: reduction of latency by 14.53 per cent at p50 of GLM-5.2
(c) The algorithm, compilation, communication and training framework capability of the Microsoft Powered Autology Mixed Cloud Service platform to access the FlagOS, linking the upper model service to the bottom isomer. The parties jointly optimized the GLM-5.2 on four 910C servers, with Prefil and Decode each accounting for two. After the full implementation of the five changes, the service and client p50 ITLs were reduced by 14.53 per cent; and the P99 ITL, which reflects long waits, was reduced from 83.82 ms to 66.35 ms by 20.84 per cent, and the client was reduced from 138.56 ms to 118.73 ms by 14.31 per cent to provide a basis for the platform ' s operator to assess the service capacity under the actual operational load.
The above-mentioned practice shows that cross-core reuse is moving from “operational models” to “efficient production” of Token: both to support new models to maintain the pace of reasoning on multiple types of chips, and to provide a basis for new models for inventory equipment, lower latency for business service platforms and measurement costs. The specific deployment would still need to be combined with the operational load, latency requirements and full operating cost determination.
iv. From Token Factory to Physics AI: World Model and Endside Calculating New Load
AI computational needs are expanding along three paths: Token Factory of the data centre seeks continuous evolution and scale efficiency, with end-side AI limited to memory, energy consumption and hardware space, and physical AI ' s home-world model introducing video, space, time, action and multisensor data. FlagOS layouts in advance, extending the algorithms, compilers, frames, etc. to physical AI and end-end calculations.
New Generation of Personalized World Models: Public Budgeters Working with Training Systems
FlagOS, a combination of fine-tuning with the new generation of intellectuals with a world model system around the Flaggems algorithm, training framework and distributional strategy, obtained approximately 2.3 x, 1.9 x, 2.0 x acceleration of the VLM, Tx2V and Action modules, respectively, and about 33%, 36% and 35% of the MFU. The frame layer uses fixed-sequence long tissue data, which delivers a stable grid shape to static compilations, and expresses sample differences with dynamic metadata, resulting in 19.7 per cent throughput increases and a decrease of 29.5 per cent VRAM; long series Attention cache output O and LSE for reverse reuse, reducing the number of forward re-lays from 288 to 0 and generating branch ingestions from 14.8 per cent. FlegGems provide optimization for key calculations, such as Attention, Index, and Contract. Attention algorithms receive about 1.40-1.43x acceleration, with index algorithms up to 2.97x, optimized for subsequent models and hardware reuse in public libraries.
LightX2V-Plugin-FL: Unified Plugin System Extension to Video and Action Generation
LightX2V is the video generation reasoning framework, and LightX2V-Plugin-FL is the plugin for access to FlagOS: Framework Organization Modeling Process, Plugin Connecting Target Devices to Calculator Execution Path, FlagGems carries the actual Attention calculation, allowing existing algorithms to enter the repeatedly executed denocator cycle of video generation, and reducing the work of adapting the model framework to different chips. The double-card validation run of DreamZero-DROID is a link from image input to video and action output, indicating that the public accounter enters the video generation frame via a unified plugin and completes the cross core and complete output on the national production hardware; the speed increase still needs to be tested against the same condition baseline.
ARM CPU: MiniCPM5-2B generated about 92 tokens/s on M5 Pro
FlagOS 2.2 Independent publish FlegTree-CPU, for ARM CPU to promote uniform compilation, lowbit algorithms and operational optimization. The tool chain is designed around different paths, such as I8MM, SDOT and flow access memory, and reduces duplicate costs through algorithm integration and movement control; on CPUs supported by the corresponding command, SME2 and NEON I8MM work together on the same level of GEMM, increasing the complete model Prefil by 21% to 25%. In the Mac M5 Pro, CPU-only tests, MiniCPM 5-2B Prefill speed exceeded 1000 tokens/s, Decode reached 91.66 tokens/s; Qwen 3.8-27B increased from 12.73 to 23.40 tokens/s, approximately 1.84 times, providing the basis for the configuration between model capabilities, equipment memory and latency for end-side applications.
From the hands-on world model training to the video and action generation plugin, to the ARM CPU side reasoning, FlagOS is extending the public accountancy, unified plugin and compilation optimization from Token Factory to physical AI and lateral calculations. The acceleration ratio in world model training with MFU, cross-chip operation validation in video generation, end-side CPU production indicates that synergetic optimization has begun to cover new loads; partial performance enhancement still needs to be continued in combination with the condition baseline and actual operational load.
From technology to global ecology: a 55 per cent increase in code contributors and a four-fold increase in downloads
International cooperation: developing open-calculations global collaboration
FlagOS is based in China and is moving globally. International cooperation included technical exchanges such as the Central African Entrepreneurship and AI Partnership Seminar, Abu Dhabi Open Company Workshop, and development and teacher training. The second phase of the Global AI Calculator Development Plan, co-organized with the African Union (AU) ASRIC, with the support of UNDP, brings together nearly 50 leading university teachers from over 30 countries. OASIS-AI 2026@MICROWorkshop focuses further on the open architecture and software infrastructure of the AI system. The United Nations “Open Calculator Working Group” was approved on 28 September and the first meeting is scheduled to take place during the APEC in November.
Developer community: Quarterly downloads increased fourfold and code contributors continued to increase
Bringing multiple hardware together to maintain a continuously updated model ecology requires long-term input. Each edition of FlagOS relies on a number of open-source communities working together to maintain interfaces and achievements on an ongoing basis with upstream communities, such as PyTorch, Triton, VLLM, SSGLang, Megatron, TransformerEngine and VeRL. As of the third quarter, there were 107 resource FlagOS ecological members, with 464,336 quarterly community downloads, which is 4.76 times higher than in the second quarter. From 2.1 to 2.2, the number of combined PRs increased from 1,890 to 4,890, the number of code submissions increased from 5,100 to 9,730, the number of new Issue from 420 to 1,423, and the number of code contributors increased by 55 per cent to 264 places.
The current AI model may be three months old, but the computing infrastructure has to create value over the years. FlagOS 2.2 shows that a technology path that deserves continued input is becoming clearer: it optimizes the deposition of algorithms, compilers, quantizations and systems to new models as reusable public capacity, delivers different chips through a unified interface and continuously validates the benefits in real models and service loads. From Token Factory to the end of AI and the world model, the value of open computing is not just to add to hardware choices, but to give every input of the calculus an opportunity to continue to function as software ecology advances.
Auto-fetched and translated by AI Gem Box. All rights belong to the original author.